1) Field of the Invention
The present invention relates to a technology for performing error correction when reproducing recorded data.
2) Description of the Related Art
Record reproduction apparatuses have a powerful error correcting function so that a signal can be reproduced without generation of an error. Only with such an error correcting function does it become possible to securely restore a signal from among unstable signals having noise.
The error correcting function is realized by a combination of two methods: a partial response maximum likelihood (PRML) and an error correcting code (ECC). The PRML is a system that regards a recording channel as a partial response (PR) channel having an inter-symbol interference, and generally carries out a maximum likelihood detection using a Viterbi detector. The ECC corrects an error that cannot be corrected by the Viterbi detector, and generally uses Reed-Solomon (RS) codes (for example, refer to S. Lin and D. J. Costello, Jr., “Error control coding: fundamentals and applications,” Prentice-Hall, 1983).
An iterative method (U.S. Pat. No. 5,446,747), which employs iterative decoding, has been proposed as a replacement of the PRML system.
As detailed configurations of iterative methods that can be applied to the record reproduction apparatus, there are a serial concatenated convolutional code (SCCC) and a low density parity check (LDPC) code (refer to T. Souvignier et al., “Turbo Decoding for PR4: Parallel Versus Serial Concatenation,” Proc. IEEE Int. Conf. on Communications, pp. 1638-1642, 1999, and R. G. Gallager, “Low-Density Parity-Check Codes,” Cambridge, Ma: MIT Press, 1963). Particularly, the latter LDPC code is considered promising as a next-generation encoding method in a magnetic disk.
This LDPC code is a linear block code and can be defined in a parity check matrix H. When a codeword length is expressed as “N”, an information bit length is expressed as “K”, and a parity length is expressed as “M=N−K”, H is a matrix of M rows and N columns. When a codeword sequence is expressed as x=(x1, x2, . . . , and xN), and an information bit sequence is expressed as u=(u1, u2, . . . and uk) in a row vector format, the following expression is formulated.HxT=0  (1)A matrix that encodes the information bit sequence u into the codeword x is called a generator matrix G, with which the following expression is formulated.x=uG  (2)Each row of H corresponds to one parity check equation. For example,
                              H          1                =                  [                                                    110100                                                                    010011                                                                    101001                                                                    001110                                              ]                                    (        3        )            corresponds to the four parity check equations:x1+x2+x4=0x2+x5+x6=0x1+x3+x6=0x3+x4+x5=0  (4)
In the LDPC code, the code length N is set large, and the number of 1 within the parity check matrix H is set small (low density). Matrix H is constructed at random as far as possible, while a column weight (number of 1 in each column of H) is set small (typically three) and constant, and a row weight (number of 1 in each row of H) is also set constant. Based on this, when the block length (that is, the code length) is large, a high error correction capability can be realized.
FIG. 10 illustrates a basic configuration of the record and reproduction system for a magnetic disk apparatus that uses the LDPC code. The magnetic disk apparatus includes an RS encoder (ECC) 1 that encodes record data. Next, a run length limited (RLL) encoder 2 codes an output of the RS encoder 1 to constrain the continuation of 0 to not larger than a constant length. As a result of the RLL coding, the operation of an automatic gain controller (AGC) circuit or a timing recovery circuit at the time of reproducing the record data can be stabilized. Next, an LDPC encoder 3 performs LDPC coding to an output of the RLL encoder 2 using the equation (2) to obtain a data sequence. The data sequence thus obtained is recorded onto a PR channel 4.
Reproduction data is first input to an iterative decoder 5 that includes a channel decoder 6 and an LDPC decoder 7. The channel decoder 6 calculates reliability information of each bit while taking into account the inter-symbol interference of the PR channel, and sends the obtained reliability information to the LDPC decoder 7. The LDPC decoder 7 updates the reliability information of each bit by taking into account the information obtained from the channel decoder 6 and a constraint according to the parity check equations. The result is sent to the channel decoder 6 again thereby forming a loop. After iterating a decoding by a predetermined number of times, the reliability information obtained by the LDPC decoder 7 is processed based on a threshold value thereby obtaining a reproduction value of each bit. This reproduction value is sent to an RS decoder 9 via an RLL decoder 8, and is error-corrected based on the RS code. Then, final reproduction data is obtained.
As a concrete decoding procedure of the channel decoder 6, a BCJR algorithm is available (L. R. Bahl et al., “Optimal decoding of linear codes for minimizing symbol error rate,” IEEE Trans. Inform. Theory, vol. 20, pp. 248-87, 1974). As a concrete decoding procedure of the LDPC decoder 7, a belief propagation algorithm is available (Z. Wu, “Coding and iterative detection for magnetic recording channels,” Kluwer Academic Publishers, 2000).
Although the iterative method is more reliable than the PRML method, circuit scale of the encoder and the decoder is still a major challenge for achieving a practical large-scale integrated circuit (LSI) with low power consumption.
The increase in the circuit scale is due to an increase in the amount of decoding operation that is necessary to carry out the iterative decoding. For example, when the decoding is carried out four times in iteration, in order to keep the same operation time as that required conventionally, four circuits need to be arranged in parallel and operated in pipeline. Consequently, the circuit scale and the power consumption become four times. To cope with this situation, a soft output Viterbi Algorithm (SOVA) and a decision aided equalizer (DAE) method are proposed to reduce the decoding operation amount.
The increase in the circuit scale is also due to an increase in the size of the memory that is necessary to hold the reliability information for all bits during the iterative decoding.
Precisely, the current magnetic disk apparatus records and reproduces 512 bytes as one unit (one sector). In this case, the code length of the LDPC code becomes about 600 bytes. When the reliability information of five bits is held for each bit, the necessary amount of memory becomes as large as about 3000 bytes. Recently there is a plan to expand one sector to 4 K bytes. In this case, the code length of the LDPC code increases to about 4700 bytes, and the memory amount increases to about 23500 bytes, which is too large to be implemented.